klayout-tools

IC layout for AI agents

Standalone tools that let AI agents parse, check, and edit chip layouts: GDSII and OASIS streams, DRC decks, headless everything, machine-readable JSON everywhere. Built on KLayout's Python API.

It is the kicad-tools playbook one layer down the stack. Over there, agents take a design from schematic to routed PCB to fabrication package, and a gallery of real boards proves it. Here, the same pattern meets silicon.

An agent can take a spec → schematic/generator → sized circuit → layout → DRC/LVS clean → extracted netlist → simulation-verified, on an open PDK, unaided — with every step headless and JSON-contracted. That closed loop is the target.

# the interface contract we are building toward
klt layers design.gds              # enumerate layers, JSON out
klt cells design.gds --top         # cell hierarchy
klt drc design.gds --deck sky130   # DRC, structured violations
klt stats design.gds --per-layer   # densities, bbox, counts

Progress lands in the repo first; worked examples appear here the way boards appear in the kicad-tools gallery. See the roadmap for the build order and the architecture doc for how the pieces fit.